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Digital Pre-emphasis Processor
Performance, Productivity, and Insight for Serial Data Signaling
The BERTScope Digital Pre-emphasis Processor DPP Series takes in single-ended inputs of data and clock and condition the signal by adding controllable amounts of pre-emphasis for use with Bit Error Rate Tester
| Features & Benefits |
- 1 to 12.5 Gb/s for Support of Hardware-based Equalization of 2nd- and 3rd-generation Serial Standards
- 3- or 4-tap for Full Support of Compliance Testing for 802.3ap, Serial Attached SCSI, 10GBASE-KR Backplanes, DisplayPort™, USB 3.0 PCI Express® Gen3
- Pre-cursor or Post-cursor Adjustment for Optimizing Compensation for ISI and Loss
- Exceptionally Easy Setup with Concurrent Multiple Domain Views Ideal for Operation as a Stand-alone Instrument Controlled by a Remote PC, or with a BERTScope for Complete Software Integration
- Precise Control to Correct for Effects such as Backplane ISI or Optical Effects with Adjustability through Tap Weights or Step Response provides the Flexibility Needed for Complete Design Characterization
- Optional integrated reference clock multiplication to PCIe compliant 2.5 GHz, 5 GHz, and 8 GHz
- Optional integrated eye opener functionality for testing DUTs with long channels
- Optional integrated clock doubler that enables full rate stress for 12 Gb/s SAS
- BERTScope Clock/Data delay compensated internally to allow length-matched matched cables
- Enclosure with the BERTScope footprint to allow equipment stacking
- New microcontroller to provide more processing power
- RS-232 interface enhancement to speed up PCIe receiver equalization link training
- Software to accommodate channel de-embedding and ISI fine adjustments
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| Applications |
- Design Characterization for High-speed, Sophisticated Designs
- Certification Testing of Serial Data Streams for Industry Standards
- Design/Verification of High-speed I/O Components and Systems
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| Quick Selector Guide |
| Model |
Description |
Max Bit Rate |
| DPP125C |
Digital Pre-emphasis Processor |
12.5 Gb/s |
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